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Please use this identifier to cite or link to this item: http://hdl.handle.net/11133/3084

Title: ASIC設計手法を用いた集積回路設計及びLSIテスタでの動作検証
Other Titles: ASIC セッケイ シュホウ オ モチイタ カイロ セッケイ オヨビ LSI テスタ デノドウサ ケンショウ
Chip Design by means of Application Specific Integrated Circuit and Operational test using Automated Test Equipment
Authors: 中野渡, 陽平
鈴木, 大晴
江口, 一彦
五島, 敬史郎
SUZUKI, Taisei
EGUCHI, Kazuhiko
GOSHIMA, Keishiro
Issue Date: 31-Mar-2016
Publisher: 愛知工業大学
Abstract: "In recently, hardware description language (HDL) is the most powerful tools for the design and development of Large Integrate Circuit (LSI). LSI circuit using ASIC (Application Specific Integrated Circuit) technology has advantages for such as low consumption and short processing time. In this paper, we have reported that the LSI circuit using ASIC technology is designed and verified for simple operation. In this paper describes the more detail operation verification in our circuit by means of an Automated Test Equipment. As a result, we can demonstrate the difference in maximum operational frequency under different the layout designs."
URI: http://hdl.handle.net/11133/3084
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