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Please use this identifier to cite or link to this item: http://hdl.handle.net/11133/2877

Title: ASIC設計手法を用いたビット幅拡張CPUの設計
Other Titles: ASIC セッケイ シュホウ オ モチイタ ビットハバ カクチョウ CPU ノ セッケイ
Chip Design for a CPU with 8-bit Wide Datapath by means of Application Specific Integrated Circuit
Authors: 鈴木, 貴斗
江口, 一彦
五島, 敬史郎
SUZUKI, Takato
EGUCHI, Kazuhiko
GOSHIMA, Keishiro
Issue Date: 31-Mar-2015
Publisher: 愛知工業大学
Abstract: "In recently, hardware description language (HDL) is the most powerful tools for the design and development of Large Integrate Circuit (LSI). LSI circuit using ASIC (Application Specific Integrated Circuit) technology has advantages for such as low consumption and short processing time. In this paper, we designed a CPU (Central Processing Unit) with large register memories and 8-bit wide detapath for the purpose of the increase processing capability. And we fabricated a custom LSI using the ASIC technology."
URI: http://hdl.handle.net/11133/2877
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