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Please use this identifier to cite or link to this item: http://hdl.handle.net/11133/1446

Title: FPGAによる画像処理演算の研究(カメラ画像の入力及びパイプライン演算による高速化)
Other Titles: FPGA ニヨル ガゾウ ショリ エンザン ノ ケンキュウ カメラ ガゾウ ノ ニュウリョク オヨビ パイプライン エンザン ニヨル コウソクカ
The Research of Image Processing System with FPGA (Input of Camera Image and Speed-up by Pipeline Operation)
Authors: 天野, 国廣
堀田, 厚生
AMANO, Kunihiro
HOTTA, Atsuo
Issue Date: 31-Mar-2009
Publisher: 愛知工業大学
Abstract: An image processing system with FPGA has been designed and implemented. It adopted the following design techniques. 1) Optimization of the module partition, 2) Improvement of memory access sequences, 3) Pipelining is introduced to the computing unit. The system was applied to an image processing implementing background subtraction. It showed the processing speed improvement by 6.5 over the system of the last design that was developed in 2006.
URI: http://hdl.handle.net/11133/1446
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