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Please use this identifier to cite or link to this item: http://hdl.handle.net/11133/1415

Title: FPGA によるITU-656 ビデオカメラのインターフェイスおよび画像演算器の設計
Other Titles: FPGA ニヨル ITU-656 ビデオカメラ ノ インターフェイス オヨビ ガゾウ エンザンキ ノ セッケイ
A Design of an Interface and Image Processing Circuit with FPGA for ITU-656 Video Camera
Authors: 加藤, 正義
堀田, 厚生
KATO, Masayoshi
HOTTA, Atsuo
Issue Date: 31-Mar-2008
Publisher: 愛知工業大学
Abstract: High-speed processing is necessary to perform image processing in real time. Hardware processing with FPGA is one of the ways to process images fast. A system processing images from video camera in real time has been designed. The system has the following blocks. 1) An interface circuit getting images from camera, de-inter-race and transfer them to SDRAM. 2) An image Processor. Two images read from the SDRAM are processed by subtraction and segmentation to 2 values. Then the resulted image is stored into the SDRAM. The processing speed with the FPGA was enough to perform real-time processing.
URI: http://hdl.handle.net/11133/1415
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